UK102 System

UK102 System

The Compukit UK101

The Compukit UK101 was an early kit based microcomputer that was a clone the Ohio Scientific Superboard II single-board computer, adapted for the UK market. The 6502 is used for the CPU and it has a 2K monitor ROM and an 8K Microsoft Basic interpreter ROM. More details on the history of the UK101 can be found on wikipedia here.

The UK101 is a simple machine which makes it it straightforward to implement in an FPGA, particularly if not all aspects of the design are needed. This was bought home to me by reading Grant Searle's excellent webpages where he presents several small computer designs including a simplified rebuild of the UK101.

Grant has minimised the hardware and modified the 2K Monitor ROM (CEGMON) to create a stripped down UK101 design that redirects keyboard input and screen output to the serial adaptor allowing the UK101 to be controlled via a serial link.

I decided to follow Grants ideas and take the BASIC and Monitor ROM images he provides (downloadable on his website) to create my own FPGA based UK101 design with a new graphics subsystem - the Character Display 5000 - to create a simple retro computer, the UK102.

UK102 System

The UK102 computer design consists of just a few components, my 6502 CPU design, two ROMs for the BASIC interpreter and the Monitor program (CEGMON), some RAM, a 6850 ACIA serial comms device, my Character Display 5000 display controller, VGA timing and glue logic. The architecture of the system is shown below.

6502, Character Display 5000 and VGA Timing

The 6502 and Character Display 5000 are Verilog blocks I have previously developed and are described in the Classic 8 bit parts and new Graphics and Sound parts sections of this website. The VGA timing block generates sync signals to output an 800x600 pixel 60Hz SVGA image, into which the 320x200 Character Display 5000 output is placed. The 320x200 pixels are doubled horizontally and vertically to better fill the SVGA screen. The clock for the whole system is derived from the VGA pixel timing. An 800x600 screen at 60Hz requires a pixel rate of 40MHz but a half rate of 20MHz is sufficient to display the 320 pixels in a 400 pixel wide screen so a main clock rate of 20MHz is used for the whole design.

6850 ACIA

The Motorola 6850 ACIA is a simple serial communications device. The datasheet can be found online and so it would be possible to implement a full model of this part in Verilog. However as part of my FPGA board development work I had designed a simple fixed speed and format serial UART device that worked well enough communicating with a PC. So rather than a full implementation all that was really needed was to add extra logic to make my own UART device look like a 6850 ACIA as far as the UK101 ROM software was concerned. The 6850 has just 4 registers, a control register, a status register, a data to transmit register and a data received register. Just a small amount of Verilog code was needed to map these onto my own UART device.

RAMs, ROM and Glue logic

The memory map of the UK102 system is shown below.

The 16K program ram is mapped to single port FPGA ram blocks using Verilog code to infer RAM behaviour. Similarly the 8K BASIC and 2K Monitor ROMs also map to single port FPGA ram blocks which are initialised with the required contents. The 4K character definition ram and 2K screen rams map to dual port FPGA ram blocks. Dual port rams are used to allow simple access to the data from both the 6502 processor and the Character Display 5000 block. A timesharing arrangement could be used to enable dual access to single port rams but FPGA ram blocks are usually dual port anyway. The 4K character definition ram is initialised with a UK101 derived character set.

Software - Basic

The BASIC interpreter ROM contains an early version of Microsoft Basic. This is powerful enought to allow simple programs to be developed and they can interact with the Character Display 5000 block by POKEs and PEEKs direct to memory.

I found a set of character definitions for the early 1980s Phoenix arcade game on the Computer Archeology website. Using the first 128 of these from the background tile set is is possible to reproduce and animate the 'Alien Mothership' graphic using a small BASIC program as listed below.

A video of this animation code in action can be found here

and a video of the terminal commands needed to get this running can be found here

Software - C code Space Invaders

Simple image animation is entertaining enough but I also wanted to see if I could write a retro arcade game, such as Space Invaders, from scratch. Whilst Basic is capable of simple animation it is too slow to really animate graphics at the rate needed for a game. Developing in 6502 machine code is the obvious answer to get more speed but this has a steep learning curve and takes time to build up all of the game code blocks. I decided to see if a compiled language would allow ease of programming yet with sufficient speed for an arcade game. Searching around revealed that there is a well supported C compiler availble for the 6502 - cc65.

Experiments with cc65 showed that compiled C code was efficient enough to allow objects to be moved around the screen fast enought for realistic game play. As a result I used it to develop a simple Space Invaders game using the 40x25 character display mode with redefined character patterns to allow smooth movement of the invaders and base. A short video of which cab be found here

Example Graphics Mode Images

Here are a couple of images which demonstrate the 160x100 pixel graphics mode. I have developed a C code program to convert images into a suitable format and to try and come up with an optimal set of 16 palettes but this needs some further work as can be seen in the Mount Fuji image.